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6502 Code Assembler (6502CA)

Welcome to my 6502 Code Assembler (6502CA) project.

It started out as a side project from one of my older projects involving the creation of a 65C02 single board computer called 65C02 GPD. The board needed a cross assembler to convert typed 6502 mnemonics (commands) into actual 6502 binary code so that I code write the firmware/OS.

Since then it's gained a life of its own and now is almost complete and sports the ability to assemble the full array of 65C02 commands and simulate any such assembled program. Currently, I'm attempting to write in support for I/O devices such as VIAs and ACIAs.

Below you'll find a time line which shows the major stages from the start until now.


Software capabilities

UI/Editor:
. Load/Save/Edit source code
. Results/output window
. Load/Save editor preferences
. Load/Save RAM contents
. Display & edit RAM contents
. Help system (via drop down menu)

Assembler:
. Assemble all official WD65C02 mnemonics
. Byte, word (2 byte), double word (4 byte) and string equates
. Label & variable support
. Explanatory errors & warnings
. Set program counter via variable assignment via source code (as well as UI)
. Set hexadecimal prefix to $ or & via source code (as well as UI)
. Copy or fill areas of RAM via source code
. 64Kbyte memory map

Simulator:
. Support for all but two official WD65C02 instructions (STP & WAI not currently supported)
. Graceful simulator exit via RTS instruction - toggleable on/off
. Text output via JSR instruction for debug (4 modes) - toggleable on/off
. Instruction cycle count
. Stepping mode (quite basic at the moment)


To-do list:
Modifiable memory map (RAM, ROM, I/O) (under developement)
Keyboard input via JSR instruction for debug - toggleable on/off (under developement)
Interrupt system
Support for STP and WAI instructions
Simulator CPU reset button



Download

Here's the most current build of this project :

Terms & Conditions of download, installation and/or use. Failure to accept them means that you are not authorised to download/install/run/use the software.

"THIS SOFTWARE IS PROVIDED 'AS IS' AND ANY EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL CONTRIBUTOR(S) BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
"

Download link for 6502CA version 0.9.3a (721 KB) - posted 11th September 2018
(note: .NET Framework 4.0 required to run. Available here or here)





Timeline


After installing VB2010 I started off with the visual interface. This initially included a scroll bar’d area to input / load the source code as text, a load, save and compile button.
After a little playing around I then added another output area and moved the buttons to drop down menus. Here’s a snapshot of the UI as it currently stands:

Compiler_UI

The “File” menu gives: “Load Source code” and “Save Source code” options
The “Project” menu gives: “Compile” and “Save RAM to disc” options
The “Diagnostics/Info” menu gives: “Display opcode table“, “Display address modes“, “Display RAM area“, “List variables“, “Show variable assignments”




[UPDATE - 12th Jan 2014]

I’ve been working on this once again and I’ve almost gotten the assembler to the end of the alpha stage. It now assembles all except the JMP instruction correctly. Here’s a lo-down of features etc:

Functional assembler capability:

. Assemble all standard (legal) 6502 commands as seen on the BBC Micro model B apart from the JMP instruction.
. All standard addressing modes used by the 6502 (as above) assemble as they should.
. A file called ‘opcodes.txt’ allows new opcodes and data commands to be added easily by the user.
. 3 out of the 4 ‘data’ commands are supported (i.e. EQUB, etc). Supported commands so far: byte, word, double word. Although string type can be read from ‘opcodes.txt’, it’s currently not supported functionally speaking,
. Labels are usable. They are treated exactly like variables in that they have a name and the value is the address where they point to. A good example: osbyte=$FFF4 (if using hex) or osbyte=65524 (if using decimal).
. Can store up to 200 variables. These are stored as strings in an array.
. Variable assignment now has basic operands such as +, -, *, /. This only works for one operation. So: A=1+2 would be ok, but A=1+2+3 would not (for now)
. Variables work in the assembler to assign values. So you can put A=1.
. The program counter can be set simply by putting p%=<value>. This works anywhere in the code as long as it’s on it’s own line.
. 2 pass assembly implemented. Pass 1 picks up variable assignments and suppresses errors, while pass 2 does the actual assembly.

Supported Features/Tools:

. Load/save source code.
. Save entire ‘RAM’ area to disc as a binary file
. View sections of the ‘RAM’ where the assembler assembles the code.
. View the variable database
. View the data command database
. View all assembler commands and associated opcodes
. View all addressing modes
. Disable/enable clearing RAM on assemble [Clear on by default]
. Disable/enable clearing variable database on assemble [Clear on by default]

Things to work on:

- Implement string data type (i.e. EQUS)
- Save specific area of RAM to disc as a binary file
- Add in 65C12 opcodes [toggle on/off]
- Add in 65C12 addressing modes [toggle on/off]
- Add in R62C02 opcodes [toggle on/off]
- Add in illegal opcodes [toggle on/off]. This may clash with some of the above.
- Error checking for file operations is required
- Standardise error messages
- Add an ‘About’ menu option & dialogue box



[UPDATE - 14th April 2014]

I've been jumping back and forth between stages on this project recently. This is because I've finalised the design and and built a soldered prototype (more about that in the appropriate section).
However, there have also been some significant changes to the assembler. Here's a few screen shots to give you an idea of the progress:

AssemblerUIpic AssemblerUIpic
(click an image to enlarge)


As you can see it's UI has been modified. Here's a simplified overview of changes:

[Editor]
. Removed O% control (alternate program counter) as it's unneeded.
. Made the window pane controls moveable so that the editor window panes can be expanded or shrunk as needed.
. Added assembler program bar and editor text cursor information at the bottom.
. Added help menu and help pages (under Notes & Advice - worth checking out).
. Tweaked the opcodes and address mode display option (found under the Diagnostic/Info menu) so that they're more readable.
. Added the Edit dropdown menu for copy & pasting. Also, CTRL+C, CTRL+V and CTRL+A keyboard shortcuts supported for copying/moving source code, etc..
. "Fill RAM" has been added to the Projects menu. This allows you to fill an area of RAM with a byte pattern.
. Can now save entire or specific area of RAM to disc.
. Error messages are now more standardised. Check the Help > Notes & Advice menu for descriptions.

[Engine]
. Added "Assemble - Debug Mode" (both cyclic and manual stepping) to the Project dropdown menu. This aides in assembling mode slowly although I might possibly remove this at a later stage as it now seems less useful.
. All standard 6502 instructions and addressing modes supported by the BBC micro are supported.
. New ASSERT command to change the hexadecimal prefix character. I like the ampersand (&), but the standard tends to be the dollar ($). This allows you to set the character in your source code
For example: ASSERT $ would change the prefix character to $. You could the put something like:
ASSERT $
LDA #$0A
The default is '&' though
. New FILL command to allow you to fill a section of RAM with a particular character. The GUI version (found in the Project dropdown menu) is currently better as it allows a byte pattern to be used instead of a single byte. This will get tweaked in time.
. Strings are now supported as a data type for EQUx operations. This allows the use of EQUS and EQS, although you can put your own version in opcodes.txt
. The program counter (p%) is now included as a proper variable. This means that it can be used in exactly the same way as any other variable, apart from the fact that it only supports an integer number between 0 and 65535 (as you'd expect :))
. More error checking has been added for various possible fault conditions (mostly file I/O and number conversions)

[Simulator] NEW!
This is a new section as I received several requests on 6502.org forums to add in a Simulator.
It's in very early stages at the moment and doesn't function beyond looking up each instruction byte as it runs through memory.
Early days!


Things still to do:

- Add in 65C12 opcodes [toggle on/off]
- Add in 65C12 addressing modes [toggle on/off]
- Add in R62C02 opcodes [toggle on/off]

Things dropped from planned implementation (at least for now):

- Illegal opcode support. Given that I'm pushing this to be more modern, I'm thinking that this feature might not be overly useful. Might do later though.



[UPDATE - 8th February 2015]

It's been a while since I've updated these web pages, although I have actually been looking at this project off and on. Mostly, I've been working on learning wire wrapping and getting a prototype together that actually works. As such there isn't a huge amount that's been done with the assembler. However, there have been a few changes. Enough for an update, anyway.

[Editor/UI]
. The Display RAM option (found in the Diagnostics/Info menu) now gives a full 16 x 22 byte scrollable display window to view the 6502 RAM contents. This is much better than the previous system which simply asked for a start and end address then gave displayed the result in the assembler output pane. It's not quite finished as I plan to allow direct data/byte entry, but for the moment it just shows RAM contents. Here's a screen shot:

AssemblerUIpic
(click image to enlarge)

. Fixed a bug where the editor would highlight the line above where the an error had been found instead of the actual line
. Added a byte count total to the end of the assembly process. This displays the total number of bytes assembled.
. New 'show decimal/binary values' option added to the Diagnostic/Info drop down menu. When enabled, this option will cause the assembler to show all 3 types of values (hex, decimal, binary) during assembly

[Engine]
. Renamed the project 6502CA which is short for 6502 Code Assembler
. All standard 6502, 65C02, and 65C12 opcodes are supported. These include the 65C12 & 65C02 ones not support by the original NMOS 6502:
PHX, PHY, PLX, PLY, TRB, TSB, BRA, STZ, CLR
. Additional addressing modes have been added:
- Zero Page Indirect. Example: LDA (&70)
- Absolute Indexed Indirect X. Example: JMP &7C00,X
Both of these were added to the 65C12 and the 65C02, but were not present in the original NMOS 6502
. Support added for additional addressing modes for existing instructions which were expanded in the 65C12/65C02
- Absolute Indexed Indirect X. Example: JMP &7C00,X
. Added a new command called SECTION (text). This displays a line of text in the assembler output, but has no affect on the assembled code. It's useful for marking sections of code in the output when trying to debug.
. Fixed a bug where EQUS/EQS would incorrectly display data if less than the string was less than three bytes.
. Fixed a bug where remarks (lines beginning with REM ' #) would be parsed for delimiters brackets, etc. and if any where present the assembler would flag it as a bug in the source code.
. Fixed a bug where instructions which use Absolute, AbsoluteX, and/or AbsoluteY address modes, but which don't use ZeroPage, ZeroPageX, and/or ZeroPageY would cause the assembler to error with an invalid address mode message. the JMP and LDA instructions are good examples.
. Added support for binary numbers. Binary values will begin with % and read right (LSb) to left (MSb). For example: LDA #12 would be LDA#%00001100 (or simply LDA#%1100 as leading 0's can be left off). Binary math is possible with variables. For example: result = 7 + %101. 'Result' would equal (7+5=) 12.
. Due to binary values being prefixed by % I've changed the program counter/assembly point from P% to PC. So to set the program counter to &1A00 you would put PC=$1A00.

Updated 6502CA UI
(click image to enlarge)


[UPDATE - 17th February 2015]

Here's version 0.9a which can be downloaded at no charge as long as you accept the following terms. If you do not accept these terms then you are not authorised to download, install and/or run the software:

"THIS SOFTWARE IS PROVIDED 'AS IS' AND ANY EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL CONTRIBUTOR(S) BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
"

Download link for 6502CA version 0.9a

Please note that you'll need .NET Framework version 4 installed and have a screen resolution of at least 1024x768.


[UPDATE - 11th June 2015]

I've added the ability to INCLUDE files into the main source code file. This allows for the splitting up of code. Also, not only are leading and trailing spaces stripped from each line as they are processed, the assembler also removes leading tab codes (ASCII code 9) which allows for using tabs to format the source code.

Finally, I'm working on basic macros. So far SETMACRO <macro name> = <command>(;<command>...) will create a macro. To specify one all that's needed is !<macro name> (<parameter>(;<parameter>...)).

The parameters are specified by using the @ sign and a single digit number 0-9. An example:

SETMACRO test = LDA #@0; LDX #@1; JSR &FFE3
.
.
.
!test 77;99

This would inject:

LDA #77
LDX #99
JSR &FFE3


There is a bug though: Sometimes a command trailing the ! macro command is erased. I'm working on this and when published will publish the next version of 6502CA.
Something else which I've put together is a 6502 language file for use in notepad++. It's set to use the .6502CA file extension (so you need to save your file with that for it to kick in).

Click here to download the file


[UPDATE - 27th August 2015]

I've added in a patch for an issue with Index Zero Page X being used when Absolute Indexed X should be. So if you put LDA &200,X then 6502CA will try and use Zero Page, but as &200 if greater than &FF then it would crash. I've also started using InnoSetup to package the app which is why it's now an EXE instead of an MSI.
As advised previously, .NET Framework 4 is required. Because of this, I've included a version without the Framework and one with. The latter will offer to install the Framework if it's not detected when you run the installer (but is a much larger download).

Download link for 6502CA version 0.9.1 (731 KB)
Download link for 6502CA version 0.9.1 (including .NET Framework 4 installer) (49.4 MB)


[UPDATE - 29th October 2017]

I've recently been working on this project again after quite a bit of a break(!)

[Editor/UI]
. Fixed a bug in the RAM display code which would result in 6502CA crashing to desktop if the grid control tried to determine if the mouse pointer was pointed at a grid cell, failed and returned invalid values.
. Added an extra option in the drop down menu under Project called Run Assembled Code [Stepping enabled] so that code can be stepped through one instruction at a time.

[Engine]
. Fixed a bug where an instruction might, if it had both a zero page and absolute version, select the absolute version where the zero page version should be used. This was caused by a varible (oldU) not being reset between each command being prcoessed
. Fixed a bug : The AND zero page indirect addressing mode (for example AND (&00)) was missing. Now implemented.
. Fixed a bug : The ADC zero page indirect addressing mode (for example ADC (&00)) was missing. Now implemented.

[Simulator]
Some significant progress on this front:
. All 6502 registers implemented: A, X, Y registers, program counter, stack pointer, status register (flags: C, Z, I, D, B, V, N)
. Number of cycles an instruction uses and total cycle count tracked
. Partial implementation of instructions (which have been mostly debugged and work). Keep in mind each instruction has from 1 to 9 opcodes:
Completed:
 LDA (9 opcodes), LDX (5 opcodes), LDY (5 opcodes), STA (8 opcodes), JMP (3 opcodes), STZ/CLR (4 opcodes)
 CMP (9 opcodes), CPX (3 opcodes), CPY (3 opcodes)
 DEC (5 opcodes), DEX (1 opcode), DEY (1 opcode), INC (5 opcodes), INX (1 opcode), INY (1 opcode)
 BPL, BMI, BVC, BVS, BRA, BCC, BCS, BNE, BEQ (1 opcode each)
 ROL (5 opcodes), ROR (5 opcodes), ASL (5 opcodes), LSR (5 opcodes)
 PHP, PHA, PHX, PHY, PLP, PLA, PLX, PLY (1 opcode each)
 TAX, TAY, TYA, TXA, NOP (1 opcode each)
 ORA (9 opcodes), AND (9 opcodes), EOR (9 opcodes)
 JSR, RTS, RTI (1 opcode each)
Partial:
 BIT, TRB, TSB, RMBx

To be honest this is a bit of a slog as there are 256 opcodes in the 65C02 instruction set and each one has to be coded and tested. Fortunately some of the instructions are repeats with slight changes in the code. I.e. LDA &0000 and LDX &0000. These ones are far easier to do.
. Added a way for code to exit the simulator: Upon initialising, the simulator injects &FFFC (the reset vector address) on to the stack. If an RTS returns &FFFC then it will cause the simulator to quit and return control to the assembler.
A side note: I'm dropping the idea of distinguising between the orignal 6502 and 65C02 (WD and Rockwell) for now. It seems easier to code for the 65C02 and then, perhaps at a later date, add in an option to switch between them.
Lastly, here's a screen shot of the simulator. Not much to see though given that none of the simulator GUI has been done yet - only text output of start, end and errors:

6502CA Simulator UI 6502CA Simulator UI stepping enabled
(click image to enlarge)


[UPDATE - 31st October 2017]

More progress on the Simulator:

[Simulator]
. Further instructions implemented:
 STX (3 opcodes), STY (3 opcodes), ADC (9 opcodes), * SBC (9 opcodes), TRB (2 opcodes), TSB (2 ocodes), BIT (5 opcodes), TSX (1 opcode), TXS (1 opcode), BRK (1 opcode)
 * SBC implementation is mostly complete, but I have yet to add the change to the C (carry) flag when it's used as a borrow source


[UPDATE - 7th November 2017]

Almost completed the Simulator opcodes plus some bug fixes and UI changes

[Editor/UI]
. Fixed another bug in the RAM display code which would result in 6502CA crashing to desktop if the grid control tried to determine if the mouse pointer was pointed at a grid cell, failed and returned invalid values.
. Modified the main drop down menu so that we now have a Simulator option. Moved the Simulator options from Projects to Simulator.

[Engine]
. Added more code into the RAM display window so that it's now possible to edit RAM locations from with the grid. Also, it now shows the 6502 RAM address of the current cell and the value.
. Added the ZeropageRelative addressing mode to allow BBRx and BBSx opcodes to assemble properly.
. Added the WAI and STP opcodes so that they can be assembled.

[Simulator]
. Further instructions implemented:
 SMB0-SMB7 (1 opcode each), RMB0-RMB7 (1 opcode each), BBR0-BBR7 (1 opcode each), BBS0-BBS7 (1 opcode each), STP (1 opcode).
 WAI has been implemented so far as it having a code subroutine and it being called. However, as there is no interrupts apart from BRK then this cannot be fully implemented - yet. Currently displays a message and then quits the simulator.
. Modified the BRK opcode from the classic 6502 operation to 65C02. I.e. it now clears the Decimal flag.
. Modified the cycle counts for ASL, LSR, ROL and ROR opcodes in Absolute,X addressing mode from the classic 6502 operation to the 65C02. I.e. reduce the cycle count by 1, but add 1 when crossing a page boundary.
. Modified the cycle count for JMP opcode in Indirect addressing mode from the classic 6502 operation to the 65C02. The change is an increase from 5 to 6 cycles.


[UPDATE - 18th November 2017]

[Editor/UI]
. Corrected a bug in error handling if 6502CA is told to load a source file on load.

[Simulator]
. Fixed a bug where some LDA instructions and all LDX & LDY instructions were not updating the N and Z flags.


Here's the latest build. Usual terms and conditions apply :
"THIS SOFTWARE IS PROVIDED 'AS IS' AND ANY EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL CONTRIBUTOR(S) BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
"

Download link for 6502CA version 0.9.2 (831 KB)
(note: .NET Framework 4.0 required to run. Available here or here)


[UPDATE - 26th November 2017]

[Engine]
. Fixed a bug where, if BBSx/BBRx code jumped backwards from the current program counter, that the jump byte would assemble with the jump byte out by 1. An example: BBS0 &FF &5000 would result in a jump to &5001 if instead of &5000 if the current PC was after address &5000.
. Modified the text displayed when BBSx/BBRx are assembled to reflect not just the address being jumped to, but also the zero page byte. An example: BBS &FF &5000 would result in BBS0 &5001 being displayed instead of BBS0 &FF &5000. This in now corrected.

[Simulator]
. Fixed a bug linked with the BBSx/BBRx backwards jump issue listed above, but in the simulator. This also affected the standard relative jump instructions such as BEQ, BNE, BRA, etc..


Here's the corrected build. Usual terms and conditions apply :
"THIS SOFTWARE IS PROVIDED 'AS IS' AND ANY EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL CONTRIBUTOR(S) BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
"

Download link for 6502CA version 0.9.2(a) (842 KB)
(note: .NET Framework 4.0 required to run. Available here or here)


[UPDATE - 1st December 2017]

[Editor/UI]
The following changes/fixes were all in the 6502 RAM display windows (ALT+D)
. Fixed a bug where, if the vector address RAM locations were changed, then it wasn't reflected in the vector address links at the top of the window
. Moved the control displaying the current address/RAM contents (that the mouse is hovering over) from the bottom right to the top right and made it bold
. Fixed a crash/exception caused by hovering the mouse over the Address column (column 0) whilst also on the top most row of RAM
This is version 0.9.2(b) and has been posted at the top of this page


[UPDATE - 11th December 2017]

[Editor/UI]
. Added a new text debug option for the simulator. This is SimTextOpt 4 and allows the value in the accumulator to be displayed in the debug/work window as a value.

[Simulator]
. Beta version of the SBC instruction has been coded. SBC is an odd one as it takes into account the C flag when it subtracts numbers. A basic way of looking at it: A=A-M-(C-1) where A=Accumulator, M=memory contents, C=C flag. But it gets complicated when the result is below 0 as we need to deal with signing / 2's compliement. Also, this instruction sets the C flag depending on the result.

This is version 0.9.2(c) and has been posted at the top of this page


[UPDATE - 17th August 2018]

[Editor/UI]
. Blocked access to the Assembler stepping options in the main UI. They are still there, but no selectable. I'm thinking about removing the assembler stepping capability enitrely as I'm no longer sure it has any real use.
. Fixed a bug where the incorrect line would be highlighted in the source file if an error was encountered during code assembly.
. Updated the help files.
. Modified the default hex number prefix from & to $ and have updated the help documenation examples accordingly.

[Engine]
. Fixed a bug where under some circumstances trying to use an unknown or incorrect addressing mode for an instruction would not generate an error - the instruction would simply be ignored. This now generates an error.

[Simulator]
. Added the Simulator status to the Editor UI at the bottom of the main window (Not Running / Running...)
. Added a Simulator option to disable the Simulators default behaviour of injecting $FFFC on to the stack at the start and then, if pulling $FFFC when an RTS instruction is excuted then exiting the simulator. This option can be found under the Simulator > Options dropdown menu. However, the default is to still allow the Simualtor to exit if $FFFC is encountered by RTS.

[Upcoming]
I'm looking at implementing a memory map facility. This will have basic RAM/ROM areas of the map with hopefully some *very* basic ACIA/VIA areas. The I/O part (ACIA/VIA) may be just a case of emulating the registers, although I will try to add as much as possible. However, the Simulator is not an emulator and so does not run at cycle-exact speeds and so having things like timers in perhaps a bit meaningless.

This is version 0.9.3 and has been posted at the top of this page


[UPDATE - 11th September 2018]

[Editor/UI / Simulator]
. Added UI option to cancel currently running simulation. Previously cancelling could only be done by pressing the Escape (Esc) key.
This can be found under Simulator > Exit Simulation dropdown menu.

6502CA Simulator Exit Simulation Option


. Partially implemented VIA support. When running a simulation it shows the status of IRA/B, DDRA/B, ORA/B registers and double-clicking the appropriate area toggles the bit value in the appropriate register. VIA support is still in the early stages.

6502CA Simulator early VIA support
(click image to enlarge)

. Added UI option to show VIA#0.
This can be found under Simulator > Show VIA#0 dropdown menu.
. Fixed a bug where BNE checked the wrong flag.

This is version 0.9.3a and has been posted at the top of this page

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