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RAM upgrade

20th April 2015

As mentioned before, I've always wanted to get hold of a BBC Model B+, which I did a year or so ago. The model I bought was the 64K one, but there was another version made by Acorn (for a short time) which had 128K RAM rather than 64K. The 128K model was exactly the same as the 64K version, but with a daughter board fitted which gave an additional 64K of Sideways RAM, available as 4 banks of 16K.
Unfortunately, the B+ 128K model is very rare and when one pops up on eBay for sale it'll invariably go for a large amount of money (£100+).

So...what to do? Well, you can upgrade a model B+ 64K to a 128K by fitting the daughter board upgrade kit and so the machine will then be as if Acorn produced it as a model B+ 128K. Sadly, these upgrade kits are almost impossible to get hold of and if one were available it'd probably be as expensive as a whole B+ 64K.
There is another option which I discovered thanks to the good folks on the stardot forums. Some of the details below were sourced from there. In particular Michael J C Firth's web page was of great help and most (if not all) of the credit belongs to him.

The procedure involves soldering three RAM chips together, fitting them to a paged ROM socket, moving a jumper and adding a few wires (not in that order). Not too hard :).
Here's how I did it (in the form of a guide):

Material & Tools
Materials
3 x 32KB Static RAM chips
4 x IC test hooks (optional)
Some 30 AWG wire (also known as kynar wire or modding wire)
Tools
Soldering iron or solder station
60/40 rosin lead or lead-free solder (0.5mm or less diameter is best)
Isopropanol (optional)

Choosing RAM chips
The first thing to do was to choose which RAM chips to use. As luck has it, I have some old Hyundai HY62256B LLP-70 chips. These are pin compatible with the Beeb's ROM sockets apart from the R/W pin (which is ignored). I could have purchased newer ones off of Farnell or even created an adapter for non-pin compatible ones, but as I'm unlikely to use the Hyundai ones elsewhere then why the heck not use them for this? Something to remember when selecting these is that, as well as being pin compatible, they must also be fast enough. As such I would recommend 100ns or faster (so 15/30/55/70/100ns). Also, some static RAM chips are narrow profile and so not very suitable.

Lifting the chip legs
The following pins on each chip were lifted slowly (and gently) using small pliers:
Pin 1 - Lifted so that they all point directly up, the pin from each touching the one above
Pin 27 - The same was done with these as with pin 1, although on mine I pointed them out to the side. See below.
Pin 20 - The bottom chip pin 20 was left alone, the middle one was lifted so that it jutted out to the side, the top one was lifted so that it pointed upwards. This was done to prevent these pins from touching each other.





Soldering the RAM chips
The chips were piggy-backed (stacked) on top of each other with attention paid to them being the correct orientation in relation to each other (pin 1 at the same end for each).
Apart from pin 20, the rest of the pins for each chip were then soldered to the same pin for the chip above/below. I.e. all pin 2's are soldered to each other, all pin 3's soldered to each other, etc.. This includes pin 1 and pin 27. I was careful not to leave the soldering iron too long on the pins to avoid damaging the chips (no more than 3-4 seconds for each).
Here's a picture of the three chips soldered together (before I cleaned the flux off of the legs lol):

(click image to enlarge)

Next I cut four sections of wire: three of these were roughly 8cm long and the last one 11cm long (although I initially made this one as short as the rest - too short!). I was trying to keep them as short as possible to avoid signal propagation issues.
Then:
- Soldered a short (8cm) wire to the collective pin 1 of the chip stack.
- Soldered another to pin the top RAM chip pin 27, and the last to the middle chip pin 27.
- Soldered the longer (11cm) wire to the collective pin 27 of the stack.

Fitting & connecting
I fitted the chip stack into the bottom right ROM socket on the board (socket IC57) and moved the jumper S12 into the east (right) position. S12 is in a jumper block just to the left of the paged ROM sockets and is the third one from the bottom. Moving it into the east position has the effect of marking socket 57 as having a 32KB physical RAM/ROM module installed (as opposed to a 16KB one).
This part of the mainboard circuit diagram shows how it's wired up:

(click image to enlarge)

Next, I connected the wire from the chip stack's pin 27 to IC81 pin 24. IC81 is located at the rear of the Beeb just south of the joystick/A-to-D port. Pin 24 is the fifth pin on the left side from the half moon marked end. On my B+ IC84 is socketed which proved to a good thing as it was quite difficult to connect the test hook to the pin leg. I ended up removing the IC, attaching the test hook and then reseating it.
This pin supplies the R/W signal so that code/data can be written to the RAM banks.
For the actual chip selects signals (pin 20 on each RAM chip); I connected them to the following:
- Top RAM pin 20 - IC46 pin 9 (just to the right of the RAM stack/IC socket 57)
- Middle RAM pin 20 - The spare pin on jumper block S13 ( just to the right of IC46)
Actually, these can be swapped around - it makes no difference. However, the position of jumper S13 on it's block and which pin is connected to the RAM stack does matter. If jumper S3 is fitted in the south position (closest to the front of the computer) and then pin 20 connected to the north pin, then the OS/Basic ROM will detected in ROM bank 0/1. Conversely, if jumpS3 is in the north position and pin 20 attached to the south pin then OS/Basic will be detected in bank 14/15. Given that on boot the Beeb scans for a language ROM starting at position 15 then I would suggest going for the latter option (as I did).
Finally, I connected the collective pin 1 of the RAM stack in one of the free east (right most) pins of the jumper block to the left paged ROM sockets (S9, S11, S12, S15, S18). I chose S9, but any will do apart from S12 as that pi is not available due to the jumper being moved.


(click image to enlarge)


Testing
And here's the result:

(click image to enlarge)

As you can see, the Acorn OS logo states 128KB and the test program detects three sets of banks (two 16KB banks per physical 32KB chip).
The screen shot is from a testing program which I located elsewhere on the web, and it does a great job. It's has couple of issues though:
1) It doesn't pick up on the inbuilt 12KB sideways RAM which comes with the B+. This is because the code tests &BFFF which is the last byte in the 16KB block of the bank. As the inbuilt bank is only 12KB in size then it will never be seen as changeable and so not as RAM.
2) If the system were to be reset between the test byte being written to &BFFF and the original one being written back over the top, then the ROM image in the bank being checked could potentially become corrupted.
I've now written my own code which is more machine code based (which doesn't really matter one way or the other), but which should pick up not only standard 16KB banks of RAM, but also the 12KB one which comes with the model B+. It does this by writing to the binary version by at &8008. As this is within the first 12KB then it will work with the built in 12KB bank. It also has the benefit of not mattering if it becomes corrupted as that byte is there for information only.

Here's the code (free to use by anyone as long as they don't claim it as their own):
 
6502 Code / BBC BASIC:
   10 MODE 7
   20 FOR I%=0 TO 3 STEP 3
   30   P%=&5000
   40   [OPT I%
   50   .rdram
   60   STX &FE30
   70   LDA &8008
   80   RTS

   90   .wrram
  100   STX &FE30
  110   STY &8008
  120   RTS

  130   .main
  140   LDA &F4
  150   PHA
  160   LDX #16
  170   .romloop
  180     DEX
  190     JSR rdram
  200     STA &80
  210     EOR #&FF
  220     STA &81
  230     TAY
  240     JSR wrram
  250     JSR rdram
  260     CMP &81
  270     BNE notdetected
  280     JMP detected
  290     .notdetected
  300     LDA #0:STA &70,X
  310     JMP next
  320     .detected
  330     LDA &80
  340     STA &8008
  350     LDA #&FF:STA &70,X
  360     .next
  370     CPX #0
  380   BNE romloop
  390   PLA
  400   STA &FE30
  410   RTS
  420 ]:NEXT I%
  430 CALL main
  440 CLS
  450 PRINT TAB(5);CHR$(141);"Sideways RAM checking utility"
  460 PRINT TAB(5);CHR$(141);"Sideways RAM checking utility"
  470 PRINT TAB(12);"Mike's Projects"
  480 PRINT TAB(14);"Shalewyn.com" 
  490 PRINT
  500 PRINT"BANK  "+CHR$(129)+"ROM"+CHR$(135)+"/"+CHR$(130)+"SWRAM"
  510 PRINT"----   -----------"
  520 FOR I%=15 TO 0 STEP -1
  530   PRINTSTR$(I%);TAB(6);
  540   IF ?(&70+I%)=&FF THEN PRINT CHR$(130);"SWRAM!" ELSE PRINT CHR$(129);"ROM"
  550 NEXT I%
Here's a BBC Micro disc image which contains the above program (for use with TurboMMC or similar system): Sideways RAM Checker disc image
If you decide to type it in then you can skip lines 440 to 510 if you wish (and don't worry about putting in the indentation). Here's a screen shot of it running on my newly upgraded B+:

(click image to enlarge)



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